1. Field of the Invention
The present invention relates to a microprocessor having a register bank. Per task, register files, including contents of a general-purpose register group containing a stack pointer and contents of a special purpose register group are saved to and retrieved from a bank block in a bank ram of the register bank.
2. Description of the Prior Art
FIG. 1 shows a structure of a register bank in a conventional microprocessor or a microprocessor system. The structure of the register bank shown in FIG. 1 comprises a register file 103 made up of a special purpose register group 101 and a general purpose register group 102, and a bank RAM 104 consisting of 256 unit banks. The special purpose register group 101 in the register file 103 consists of a current bank pointer (CBP), a processor status word (PSW), a preceding bank pointer (PBP), a program counter (PC), and a stack pointer (SP).
The current bank pointer (CBP) is used in order to indicate the head position of unit banks in the bank ram 104 to which the contents of the general purpose register are stored. The processor status word PSW indicates the status of a current task. The preceding bank pointer (PBP) stores information or data of the head position of unit banks in the bank ram 104 to which the contents of the general purpose register 102 and the special purpose register group 101 in a previous task are stored. The program counter (PC) indicates an address of instruction to be executed by an execution unit. The stack pointer (SP) has a fixed bit width, for example, a 16 bit width.
As shown in FIG. 1, the general purpose register group 102 is composed of 16 registers (RW0 to RW15) each having a 16 bit width.
Each of the unit banks (BANK 0 to BANK 256) constituting the bank RAM 104 is made up of four registers each having 16 bits (not shown in detail in FIG. 1), the bank pointers such as the current bank pointer (CBP) and the previous bank pointer (PBP) designate one of the unit banks, respectively.
In general, the contents of the general purpose register group 102 in the register file 103 are saved into four successively connected unit banks (BANK 3, BANK 4, BANK 5, and BANK 6) in the bank RAM 104, and the contents of the special purpose register group 101 in the register file 103 are saved into two successively connected unit banks (BANK 1 and BANK 2) in the bank RAM 104.
Further, in the conventional microprocessor the number of the registers in the register file 103 saved to one bank block is fixed. For example, the number of the registers in the general purpose register group 102 whose contents are saved into the bank block in the bank ram 104 is fixed, namely the number is 16 in the structure of the register bank shown in FIG. 1
Where the term "bank block" means a unit bank or a group of unit banks to which the contents of a predetermined number of the registers in the general purpose register group 102 are saved.
In the structure of the conventional register bank described above, the number of the registers whose contents are saved to one bank block is fixed per bank block.
Accordingly, when there is a small number of contents in the general purpose register group 102 and the contents are saved into one bank block, unused unit banks exist in the bank block. It is a waste of hardware.
Moreover, when the stack pointer SP is seen as one of the special purpose registers, the following two problems (1) and (2) occur in the conventional microprocessor.
(1) A special instruction or new instruction for saving the content of the stack pointer SP to the bank RAM 104 must be added in an instruction set of the conventional microprocessor. In this case, the number of instructions in the instruction set of the conventional microprocessor must be increased; or
(2) Instead of introducing the special instruction or the new instruction into the instruction set of the conventional microprocessor, for example, if an instruction such as a "load" instruction in the instruction set in the conventional microprocessor is used for saving the content of the stack pointer SP to the bank RAM 104, additional steps therefor must be required.
On the other hand, when the stack pointer SP is set as one part of the general purpose register 102, the special instruction for saving the content of the stack pointer SP described above is not required.
However, because the bit width of the stack pointer SP is fixed, for example, when the bit width of the stack pointer SP is wide, the number of the registers which are used in the microprocessor system as the general purpose registers 102 is decreased. In this case, the number of registers required for the general purpose register 102 is decreased. This is a problem.
As described above, in the structure of the register bank used for the conventional microprocessor in the prior art, the stack pointer SP is employed as a part of a special purpose register group or as a part of a general purpose register group.
As stated above, with a conventional microprocessor having the register bank, there are the drawbacks or the problems that:
When the stack pointer SP is seen as one of the special purpose registers in the special purpose register group, the special instruction or the new instruction for saving the content of the stack pointer to the bank RAM 104 must be newly added. In this case, the number of the instructions making up an instruction set in the microprocessor should be increased.
Instead of introducing the special instruction or the new instruction into the instruction set, for example, if an instruction such as a "load" instruction stored in the instruction set of the conventional microprocessor or microprocessor system is used for saving the content of the stack pointer SP to the bank RAM 104, additional steps, therefor, must be required.
On the other hand, when the stack pointer SP is used in the general purpose register group 102, the number of registers in the general purpose register group 102 to be used for the stack pointer SP is increased because the bit width of the stack pointer is fixed. In this case, the conventional microprocessor cannot use efficiently in area the general purpose register group 102.